C8051F321-GMR Datasheet, PDF (140/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family

C8051F320/1
15.1. Endpoint Addressing
A total of eight endpoint pipes are available. The control endpoint (Endpoint0) always functions as a
bi-directional IN/OUT endpoint. The other endpoints are implemented as three pairs of IN/OUT endpoint
pipes:
Endpoint
Endpoint0
Endpoint1
Endpoint2
Endpoint3
Table 15.1. Endpoint Addressing Scheme
Associated Pipes
Endpoint0 IN
Endpoint0 OUT
Endpoint1 IN
Endpoint1 OUT
Endpoint2 IN
Endpoint2 OUT
Endpoint3 IN
Endpoint3 OUT
USB Protocol Address
0x00
0x00
0x81
0x01
0x82
0x02
0x83
0x03
15.2. USB Transceiver
The USB Transceiver is configured via the USB0XCN register shown in Figure 15.1. This configuration
includes Transceiver enable/disable, pull-up resistor enable/disable, and device speed selection (Full or
Low Speed). When bit SPEED = ‘1’, USB0 operates as a Full Speed USB function, and the on-chip pull-up
resistor (if enabled) appears on the D+ pin. When bit SPEED = ‘0’, USB0 operates as a Low Speed USB
function, and the on-chip pull-up resistor (if enabled) appears on the D- pin. Bits4-0 of register USB0XCN
can be used for Transceiver testing as described in Figure 15.1. The pull-up resistor is enabled only when
VBUS is present (see Section “8.2. VBUS Detection” on page 67 for details on VBUS detection).
Note: The USB clock should be active before the Transceiver is enabled.
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Rev. 1.4