C8051F321-GMR Datasheet, PDF (154/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family

C8051F320/1
USB Register Definition 15.12. OUT1INT: USB0 Out Endpoint Interrupt
R
R
R
R
R
R
R
-
-
-
-
OUT3 OUT2 OUT1
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits7–4:
Bit3:
Bit2:
Bit1:
Bit0:
Unused. Read = 0000b. Write = don’t care.
OUT3: OUT Endpoint 3 Interrupt-pending Flag
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 3 interrupt inactive.
1: OUT Endpoint 3 interrupt active.
OUT2: OUT Endpoint 2 Interrupt-pending Flag
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 2 interrupt inactive.
1: OUT Endpoint 2 interrupt active.
OUT1: OUT Endpoint 1 Interrupt-pending Flag
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 1 interrupt inactive.
1: OUT Endpoint 1 interrupt active.
Unused. Read = 0b; Write = don’t care.
R
Reset Value
-
00000000
Bit0 USB Address:
0x04
154
Rev. 1.4