C8051F321-GMR Datasheet, PDF (124/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family

C8051F320/1
Table 13.2. Typical USB Low Speed Clock Settings
Clock Signal
USB Clock
Internal Oscillator
Clock Signal
USB Clock
External Oscillator
Internal Oscillator
Input Source Selection
Internal Oscillator/2
Divide by 1
External Oscillator
Input Source Selection
External Oscillator/4
Crystal Oscillator Mode
24 MHz Crystal
Register Bit Settings
USBCLK = 001b
IFCN = 11b
Register Bit Settings
USBCLK = 101b
XOSCMD = 110b
XFCN = 111b
SFR Definition 13.5. CLKSEL: Clock Select
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
USBCLK
-
-
CLKSL
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address
0xA9
Bit 7:
Bits6–4:
Unused. Read = 0b; Write = don’t care.
USBCLK2–0: USB Clock Select
These bits select the clock supplied to USB0. When operating USB0 in full-speed mode, the
selected clock should be 48 MHz. When operating USB0 in low-speed mode, the selected
clock should be 6 MHz.
USBCLK
000
001
010
011
100
101
110
111
Selected Clock
4x Clock Multiplier
Internal Oscillator/2
External Oscillator
External Oscillator/2
External Oscillator/3
External Oscillator/4
RESERVED
RESERVED
Bits3–2: Unused. Read = 00b; Write = don’t care.
Bits1–0: CLKSL1–0: System Clock Select
These bits select the system clock source.
CLKSL
00
01
10
11
Selected Clock
Internal Oscillator (as determined by the
IFCN bits in register OSCICN)
External Oscillator
4x Clock Multiplier/2
RESERVED
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Rev. 1.4