C8051F321-GMR Datasheet, PDF (116/250 Pages) Silicon Laboratories – Full Speed USB, 16 k ISP FLASH MCU Family

C8051F320/1
13. Oscillators
C8051F320/1 devices include a programmable internal oscillator, an external oscillator drive circuit, and a
4x Clock Multiplier. The internal oscillator can be enabled/disabled and calibrated using the OSCICN and
OSCICL registers, as shown in Figure 13.1. The system clock (SYSCLK) can be derived from the internal
oscillator, external oscillator circuit, or the 4x Clock Multiplier divided by 2. The USB clock (USBCLK) can
be derived from the internal oscillator, external oscillator, or 4x Clock Multiplier. Oscillator electrical specifi-
cations are given in Table 13.3 on page 125.
Option 2
VDD
XTAL2
Option 3
XTAL2
Option 1
XTAL1
10M
XTAL2
Option 4
XTAL2
OSCICL
OSCICN
CLKSEL
EN
Programmable
IOSC
Internal Clock
n
Generator
Input
Circuit
EXOSC
OSC
IOSC
OSCXCN
EXOSC
x2
x2
EXOSC / 2
Clock Multiplier
IOSC / 2
EXOSC
EXOSC / 2
EXOSC / 3
CLKMUL
EXOSC / 4
SYSCLK
USBCLK
Figure 13.1. Oscillator Diagram
13.1. Programmable Internal Oscillator
All C8051F320/1 devices include a programmable internal oscillator that defaults as the system clock after
a system reset. The internal oscillator period can be programmed via the OSCICL register as defined by
Equation 13.1, where f_BASE is the frequency of the internal oscillator following a reset, T is the change in
internal oscillator period, and OSCICL is a change to the value held in register OSCICL.
116
Rev. 1.4