C8051F388-B Datasheet, PDF (36/285 Pages) Silicon Laboratories – Flash MCU Family

C8051F388/9/A/B
Table 5.3. Port I/O DC Electrical Characteristics
V_DD = 2.7 to 3.6 V, –40 to +85 °C unless otherwise specified.
Parameter
Test Condition
Min
Typ
Max
Unit
Output High Voltage I_OH = –3 mA, Port I/O push-pull V_DD – 0.7
—
—
V
I_OH = –10 μA, Port I/O push-pull V_DD – 0.1
—
—
I_OH = –10 mA, Port I/O push-pull
—
V_DD – 0.8
—
Output Low Voltage
I_OL = 8.5 mA
I_OL = 10 μA
I_OL = 25 mA
—
—
0.6
V
—
—
0.1
—
1.0
—
Input High Voltage
2.0
—
—
V
Input Low Voltage
—
—
0.8
V
Input Leakage
Current
INT2 Detection Input
Low Voltage
Weak Pullup Off
Weak Pullup On, V_IN = 0 V
—
—
±1
μA
—
15
50
—
—
1.0
V
INT2 Detection Input
High Voltage
3.0
—
—
V
Table 5.4. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Parameter
Test Condition
Min
Typ
Max
Unit
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
I_OL = 8.5 mA,
V_DD = 2.7 V to 3.6 V
RST = 0.0 V
—
—
0.6
V
0.7 x V_DD —
—
V
—
— 0.3 x V_DD V
—
15
40
μA
V_DD Monitor Threshold (V_RST)
2.60
2.65
2.70
V
Missing Clock Detector Time- Time from last system clock
80
580
800
μs
out
rising edge to reset initiation
Reset Time Delay
Delay between release of any
—
reset source and code
execution at location 0x0000
—
250
μs
Minimum RST Low Time to
Generate a System Reset
15
—
—
μs
V_DD Monitor Turn-on Time
V_DD Monitor Supply Current
—
—
100
μs
—
15
50
μA
36
Rev. 1.1