C8051F388-B Datasheet, PDF (240/285 Pages) Silicon Laboratories – Flash MCU Family

C8051F388/9/A/B
SFR Definition 25.10. TMR2RLL: Timer 2 Reload Register Low Byte
Bit
7
6
5
4
3
2
1
0
Name
TMR2RLL[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xCA; SFR Page = 0
Bit
Name
Function
7:0 TMR2RLL[7:0] Timer 2 Reload Register Low Byte.
TMR2RLL holds the low byte of the reload value for Timer 2.
SFR Definition 25.11. TMR2RLH: Timer 2 Reload Register High Byte
Bit
7
6
5
4
3
2
1
0
Name
TMR2RLH[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xCB; SFR Page = 0
Bit
Name
Function
7:0 TMR2RLH[7:0] Timer 2 Reload Register High Byte.
TMR2RLH holds the high byte of the reload value for Timer 2.
SFR Definition 25.12. TMR2L: Timer 2 Low Byte
Bit
7
6
5
4
3
2
1
0
Name
TMR2L[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xCC; SFR Page = 0
Bit Name
Function
7:0 TMR2L[7:0] Timer 2 Low Byte.
In 16-bit mode, the TMR2L register contains the low byte of the 16-bit Timer 2. In 8-
bit mode, TMR2L contains the 8-bit low byte timer value.
240
Rev. 1.1