C8051F388-B Datasheet, PDF (252/285 Pages) Silicon Laboratories – Flash MCU Family

C8051F388/9/A/B
SFR Definition 25.20. TMR4RLL: Timer 4 Reload Register Low Byte
Bit
7
6
5
4
3
2
1
0
Name
TMR4RLL[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0x92; SFR Page = F
Bit
Name
Function
7:0 TMR4RLL[7:0] Timer 4 Reload Register Low Byte.
TMR4RLL holds the low byte of the reload value for Timer 4.
SFR Definition 25.21. TMR4RLH: Timer 4 Reload Register High Byte
Bit
7
6
5
4
3
2
1
0
Name
TMR4RLH[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0x93; SFR Page = F
Bit
Name
Function
7:0 TMR4RLH[7:0] Timer 4 Reload Register High Byte.
TMR4RLH holds the high byte of the reload value for Timer 4.
SFR Definition 25.22. TMR4L: Timer 4 Low Byte
Bit
7
6
5
4
3
2
1
0
Name
TMR4L[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0x94; SFR Page = F
Bit
Name
Function
7:0 TMR4L[7:0] Timer 4 Low Byte.
In 16-bit mode, the TMR4L register contains the low byte of the 16-bit Timer 4. In
8-bit mode, TMR4L contains the 8-bit low byte timer value.
252
Rev. 1.1