C8051F388-B Datasheet, PDF (249/285 Pages) Silicon Laboratories – Flash MCU Family

C8051F388/9/A/B
25.4. Timer 4
Timer 4 is a 16-bit timer formed by two 8-bit SFRs: TMR4L (low byte) and TMR4H (high byte). Timer 4 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T4SPLIT bit (TMR4CN.3) defines
Timer 4 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
source divided by 8. Note that the external oscillator source divided by 8 is synchronized with the system
clock.
25.4.1. 16-bit Timer with Auto-Reload
When T4SPLIT (TMR4CN.3) is zero, Timer 4 operates as a 16-bit timer with auto-reload. Timer 4 can be
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 4
reload registers (TMR4RLH and TMR4RLL) is loaded into the Timer 4 register as shown in Figure 25.12,
and the Timer 4 High Byte Overflow Flag (TMR4CN.7) is set. If Timer 4 interrupts are enabled (if EIE1.7 is
set), an interrupt will be generated on each Timer 4 overflow. Additionally, if Timer 4 interrupts are enabled
and the TF4LEN bit is set (TMR4CN.5), an interrupt will be generated each time the lower 8 bits (TMR4L)
overflow from 0xFF to 0x00.
Figure 25.12. Timer 4 16-Bit Mode Block Diagram
Rev. 1.1
249