K4G323222A Datasheet, PDF (42/49 Pages) Samsung semiconductor – 32Mbit SGRAM

K4G323222A
Clock suspension & DQM operation cycle @CAS Latency=2, Burst Length=4
CMOS SGRAM
CLOCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CKE
CS
RAS
CAS
ADDR
Ra
Ca
Cb
Cc
BA
A8/AP
Ra
WE
DSF
DQM
*Note 1
DQ
Qa0 Qa1
Qa2
Qa3
Qb0 Qb1
Dc0
Dc2
tSHZ
tSHZ
Row Active Read
Clock
Suspension
Read
*Note : 1. DQM needed to prevent bus contention.
- 42
Read DQM
Write
DQM
Write
Clock
Suspension
: Don′t care
Rev. 1.3 (Dec. 2000)