K4G323222A Datasheet, PDF (23/49 Pages) Samsung semiconductor – 32Mbit SGRAM

K4G323222A
10. Clock Suspend Exit & Power Down Exit
1) Clock Suspend (=Active Power Down) Exit
CLK
CKE
tSS
Internal
CLK
Note 1
CMD
RD
CMOS SGRAM
2) Power Down (=Precharge Power Down) Exit
CLK
CKE
tSS
Internal
CLK
Note 2
CMD
NOP ACT
11. Auto Refresh & Self Refresh
1) Auto Refresh^{Note 3}
CLK
CMD
Note 4
PRE
AR
CKE
Note 5
CMD
tRP
tRC
2) Self Refresh^{Note 6}
CLK
Note 4
CMD
PRE
SR
CKE
CMD
tRP
tRC
*Note : 1. Active power down : one or more bank active state.
2. Precharge power down : both bank precharge state.
3. The auto refresh is the same as CBR refresh of conventional DRAM.
No precharge commands are required after Auto Refresh command.
During tRC from auto refresh command, any other command can not be accepted.
4. Before executing auto/self refresh command, both banks must be idle state.
5. (S)MRS, Bank Active, Auto/Self Refresh, Power Down Mode Entry.
6. During self refresh mode, refresh interval and refresh operation are perfomed internally.
After self refresh entry, self refresh mode is kept while CKE is LOW.
During self refresh mode, all inputs expect CKE will be don′t cared, and outputs will be in Hi-Z state.
During tRC from self refresh exit command, any other command can not be accepted.
Before/After self refresh mode, burst auto refresh cycle (2K cycles) is recommended.
Rev. 1.3 (Dec. 2000)
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