K4G323222A Datasheet, PDF (19/49 Pages) Samsung semiconductor – 32Mbit SGRAM

K4G323222A
3. CAS Interrupt (I)
1) Read interrupted by Read (BL=4)^{Note 1}
CLK
CMD
ADD
DQ(CL2)
DQ(CL3)
RD RD
AB
QA0 QB0 QB1 QB2 QB3
tCCD
Note 2
QA0 QB0 QB1 QB2 QB3
CMOS SGRAM
2) Write interrupted by(Block) Write (BL=2)
CLK
CMD
ADD
DQ
WR WR
tCCD Note 2
AB
DA0 DB0 DB1
tCDL
Note 3
WR BW
tCCD Note 2
CD
Note 4
DC0 Pixel
tCDL
Note 3
4) Block Write to Block Write
CLK
CMD
BW BW
ADD
DQ
AB
Note 4
Pixel Pixel
tBWC
Note 5
3) Write interrupted by Read (BL=2)
DQ(CL2)
DQ(CL3)
WR RD
tCCD Note 2
AB
DA0
DA0
tCDL
Note 3
QB0 QB1
QB0 QB1
*Note : 1. By " Interrupt ", It is possible to stop burst read/write by external command before the end of burst.
By "CAS Interrupt" , to stop burst read/write by CAS access ; read, write and block write.
2. tCCD : CAS to CAS delay. (=1CLK)
3. tCDL : Last data in to new column address delay. (=1CLK)
4. Pixel :Pixel mask.
5. tBWC : Block write minimum cycle time.
Rev. 1.3 (Dec. 2000)
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