K4G323222A Datasheet, PDF (3/49 Pages) Samsung semiconductor – 32Mbit SGRAM

K4G323222A
CMOS SGRAM
512K x 32Bit x 2 Banks Synchronous Graphic RAM
FEATURES
GENERAL DESCRIPTION
• 3.3V power supply
• LVTTL compatible with multiplexed address
• Dual bank operation
• MRS cycle with address key programs
-. CAS Latency (2, 3)
-. Burst Length (1, 2, 4, 8 & full page)
-. Burst Type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the
system clock
• Burst Read Single-bit Write operation
• DQM 0-3 for byte masking
• Auto & self refresh
• 32ms refresh period (2K cycle)
• 100 Pin PQFP, TQFP (14 x 20 mm)
Graphics Features
• SMRS cycle.
-. Load color register
• Block Write(8 Columns)
The K4G323222A is 33,554,432 bits synchronous high data
rate Dynamic RAM organized as 2 x 524,288 words by 32 bits,
fabricated with SAMSUNG′s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock. I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst length, and programmable latencies allows the same
device to be useful for a variety of high bandwidth, high perfor-
mance memory system applications.
8 columns block write improves performance in graphics sys-
tems.
ORDERING INFORMATION
Part NO.
Max Freq. Interface
K4G323222A-PC/L45
222MHz
K4G323222A-PC/L50
200MHz
K4G323222A-PC/L7C 133MHz@CL2 LVTTL
K4G323222A-PC/L60
166MHz
K4G323222A-PC/L70
143MHz
K4G323222A-QC/L45
222MHz
K4G323222A-QC/L50
200MHz
K4G323222A-QC/L7C 133MHz@CL2 LVTTL
K4G323222A-QC/L60
166MHz
K4G323222A-QC/L70
143MHz
Package
100 PQFP
100 TQFP
FUNCTIONAL BLOCK DIAGRAM
CLK
CKE
CS
RAS
CAS
WE
DSF
DQMi
DQMi
BLOCK
WRITE
CONTROL
LOGIC
•
COLUMN
MASK
WRITE
CONTROL
LOGIC
MUX
COLOR
REGISTER
DQMi
DQi
(i=0~31)
512Kx32 512Kx32
•
CELL
CELL
ARRAY
ARRAY
•
SERIAL
COUNTER
ROW DECORDER
BANK SELECTION
COLUMN ADDRESS
BUFFER
ROW ADDRESS
BUFFER
REFRESH
COUNTER
ADDRESS REGISTER
* Samsung Electronics reserves the right to
change products or specification without
CLOCK ADDRESS(A0~A10,BA) _notice.
Rev. 1.3 (Dec. 2000)
-3-