K4G323222A Datasheet, PDF (22/49 Pages) Samsung semiconductor – 32Mbit SGRAM

K4G323222A
8. Burst Stop & Precharge Interrupt
1) Write Interrupted by Precharge (BL=4)
CLK
CMD
WR
PRE
DQM
DQ
D0 D1 D2 D3
tRDL Note 1,5
3) Read Interrupted by Precharge (BL=4)
CLK
CMD
RD
PRE
DQ(CL2)
Note 3
1
Q0 Q1
DQ(CL3)
2
Q0 Q1
CMOS SGRAM
2) Write Burst Stop (Full Page Only)
CLK
CMD
WR
STOP
DQ
D0 D1 D2
tBDL
4) Read Burst Stop (Full Page Only)
CLK
CMD
DQ(CL2)
DQ(CL3)
RD
STOP
Note 3
1
Q0 Q1
2
Q0 Q1
9. MRS & SMRS
1) Mode Register Set
CLK
CMD
Note 4
PRE
MRS ACT
2) Special Mode Register Set
CLK
CMD
SMRS ACT SMRS SMRS BW
tRP
1CLK
1CLK 1CLK 1CLK 1CLK
*Note : 1. tRDL : 2 CLK, Last Data in to Row Precharge.
2. tBDL : 1 CLK, Last Data in to Burst Stop Delay.
3. Number of valid output data after Row precharge or burst stop : 1, 2 for CAS latency= 2, 3 respectiviely.
4. PRE : Both banks precharge if necessary.
MRS can be issued only at all bank precharge state.
5. For -60/70 devices, tRDL can be programmed as 1CLK if Auto-Precharge is not used in the design
Rev. 1.3 (Dec. 2000)
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