7220 Datasheet, PDF (81/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

FUNCTIONAL DESCRIPTION
2.8 Multi-master I²C-BUS interface
I²C Control Register
b7 b6 b5 b4 b3 b2 b1 b0
I²C control register (S1D : address 00DA 16)
B
Name
Functions
After reset R W
0 ^{Bit counter}
to ^{(Number of transmit/recieve}
2 ^bits)
(BC0 to BC2)
3 I²C-BUS interface use
enable bit (ESO)
4 Data format selection bit
(ALS)
5 Addressing format selection
bit (10BIT SAD)
6, 7 Connection control bits
between I²C-BUS interface
and ports
(BSEL0, BSEL1)
b2 b1 b0
0 0 0: 8
0 0 1: 7
0 1 0: 6
0 1 1: 5
1 0 0: 4
1 0 1: 3
1 1 0: 2
1 1 1: 1
0 : Disabled
1 : Enabled
0 : Addressing mode
1 : Free data format
0 : 7-bit addressing format
1 : 10-bit addressing format
b7 b6 Connection port
0 0 : None
0 1 : SCL1, SDA1
1 0 : SCL2, SDA2
1 1 : SCL1, SDA1
SCL2, SDA2
0 _RW
0 _RW
0 _RW
0 _RW
0 _RW
Note: When using ports P11-P14 as I² C-BUS interface, the output structure changes
automatically from CMOS output to N-channel open-drain output. However, set
the port direction register to “1” (output mode).
Fig. 2.8.6 I²C control register
2-54
7220 Group User’s Manual