7220 Datasheet, PDF (68/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

FUNCTIONAL DESCRIPTION
2.7 Serial I/O
XIN
P20/SCLK
P21/SOUT
P22/SIN
1/2
P20 latch
SM3
P21 latch
SM3
1/2
Synchronous circuit
SM5 : LSB
Data bus
SM2
S
Frequency
divider
1/4 1/8 1/16
SM1
SM0
Clock source
generating circuit
Selection gate :
Connected to black
side at reset.
SM : Serial I/O mode register
Serial I/O counter (8)
Serial I/O interrupt
request
MSB
SM6
Serial I/O shift register (8)
(Address 00DD16)
8
Note: When the data is set in the serial I/O register (address 00DD16),
the register functions as the serial I/O shift register.
Fig. 2.7.1 Serial I/O block diagram
Serial I/O Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
0
Serial I/O mode register (SM) [Address 00DC16]
B
Name
0, 1 Internal synchronous
clock selection bits
(SM0, SM1)
Functions
b1 b0
0 0: f(XIN)/4
0 1: f(XIN)/16
1 0: f(XIN)/32
1 1: f(XIN)/64
After reset ^{R W}
0 RW
2 ^{Synchronous clock}
selection bit (SM2)
3 ^{Serial I/O port}
selection bit (SM3)
4 Fix this bit to “0.”
0: External clock
1: Internal clock
0: P20, P21 functions
as port
1: SCLK, SOUT
5 Transfer direction
selection bit (SM5)
0: LSB first
1: MSB first
6 Serial input pin
selection bit (SM6)
0: Input signal from S IN pin
1: Input signal from S OUT pin
7 ^{Nothing is assigned. This bit is a write disable bit.}
When this bit is read out, the value is “0.”
0 RW
0 RW
0 RW
0 RW
0 RW
0 R—
Fig. 2.7.2 Serial I/O mode register (address 00DC16)
7220 Group User’s Manual
2-41