7220 Datasheet, PDF (184/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
5.1 Example of multi-line display
(3) CRT interrupt processing routine when setting multiple interrupts
Figure 5.1.10 shows the flowchart of CRT interrupt processing routine when setting multiple interrupts.
A and B are the setting routines for multiple interrupts.
A
Set routine for
multiple
interrupts
Enable state of
multiple interrupts
(VSYNC, Timer 1)
ICON1, ICON2: Interrupt control registers 1, 2
CRT_ICON1, CRT_ICON2 : Back up RAM for interrupt control
registers 1, 2 during CRT interrupt
CRT interrupt processing routine
A : Accumulator
X : Index register X
Y : Index register Y
T
←“0”
D
←“0”
T : X modified operation mode flag
D : Decimal operation mode flag
CRT_ICON1
←ICON1
CRT_ICON2
←ICON2
ICON1 (address 00FE 16) ←“001000012”
ICON2 (address 00FF 16) ←“000000002”
I
←“0”
Push registers X, Y, A
CRT interrupt processing
←Enable VSYNC and Timer 1 interrupts to
take priority than CRT interrupt.
And also, be sure to disable the following interrupts:
-CRT interrupt
-all interrupts with lower priority than CRT
interrupt.
Pop the registers X, Y, A
B
Disable
multiple interrupts
I
ICON1
ICON2
←“1”
←CRT_ICON1
←CRT_ICON2
RETURN
←Disable all interrupts
←Pop ICON 1 and 2 contents
during CRT interrupt
Fig. 5.1.10 Flowchart of CRT interrupt processing routine (when setting multiple interrupts)
7220 Group User’s Manual
5-11