7220 Datasheet, PDF (42/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

FUNCTIONAL DESCRIPTION
2.3 Memory assignment
s2 Page Register Area (addresses 21716 to 21B16)
<Bit allocation >
<State immediately after reset >
:
: Name
Function bit
0 ^{: “0” immediately after reset}
1 : “1” immediately after reset
: No function bit
0 ^{: Fix this bit to “0”}
(do not write “1”)
? : Indeterminate immediately
after reset
1 : Fix this bit to “1”
(do not write “0”)
Address
Register
Bit allocation
State immediately after reset
b7
b0 b7
b0
21716 ROM correction address 1 (high-order) ^{ADH17 ADH16 ADH15 ADH14 ADH13 ADH12 ADH11 ADH10}
?
21816 ROM correction address 1 (low-order) ^{ADL17 ADL16 ADL15 ADL14 ADL13 ADL12 ADL11 ADL10}
?
21916
21A16
21B16
ROM correction address 2 (high-order)
ROM correction address 2 (low-order)
ROM correction enable register (RCR)
ADH27 ADH26 ADH25 ADH24 ADH23 ADH22 ADH21 ADH20
ADL27 ADL26 ADL25 ADL24 ADL23 ADL22 ADL21 ADL20
0 0 ^{RCR1 RCR0}
?
?
0016
Note: Only M37221M8-XXXSP and M37221MA-XXXSP have this area.
Fig. 2.3.5 Memory map of 2 page register (only M37221M8-XXXSP and M37221MA-XXXSP)
7220 Group User’s Manual
2-15