7220 Datasheet, PDF (176/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
5.1 Example of multi-line display
5.1.3 General flowchart
The multi-line display processing routine consists of initialization processing routine, VSYNC interrupt processing
routine, and CRT interrupt processing routine.
(1) Initialization processing routine
This routine is used to initialize to cause a CRT interrupt.
CRTE : Bit 4 of interrupt control register 1
<CRT interrupt enable bit>
CRTR : _{Bit 4 of interrupt request register 1}
<CRT interrupt request bit>
CS : _{Character size register}
HR : _{Horizontal position register}
Multi-line display start
Line counter : Counter RAM for line counting
CV1, CV2 : Vertical position registers 1, 2
P5D : Port P5 direction register
CRTP : CRT port control register
CC : CRT control register
CO0 to CO3 : Color registers 0 to 3
F_VSYNC : VSYNC flag
MD : Border selection register
CK : CRT clock selection register
Initialization
CRTE (bit4 at address 00FE 16) ←“0”
CC (address 00EA 16) ←“000000002”
P5D (address 00CB 16) ←“000000002”
CRTP (address 00EC 16) ←“000000002”
CO0 (address 00E6 16)
CO1 (address 00E7 16)
CO2 (address 00E8 16)
CO3 (address 00E9 16)
←“000010002” (red)
←“000000102” (blue)
←“000011102” (white)
←“000001102” (cyan)
Disable only CRT interrupt
All blocks display off
Select R/G/B/OUT1
HSYNC/VSYNC input polarity : positive polarity input
R/G/B/OUT1 output polarity : positive polarity output
Color register 0 : red
Color register 1 : blue
Color register 2 : white
Color register 3 : cyan
Block 1 display RAM ←
Display character (blank) of block 1 (addresses 0600 16 to 061716)
Character color (no output) of block 1 (addresses 0680 16 to 069716)
CV1 (address 00E1 16)←
Vertical display start position of the 11th line (block 1)
Block 2 display RAM ←
Display character (blank) of block 2 (addresses 0620 16 to 063716)
Character color (no output) of block 2 (addresses 06A0 16 to 06B716)
CV2 (address 00E2 16)←
Vertical display start position of the 12th line (block 2)
CS (address 00E4 16)
MD (address 00E5 16)
HR (address 00E0 16)
CK (address 00ED 16)
←“00000000 2”
←“00000101 2”
←“XXXXXXXX 2”
←“00000010 2”
Character size : minimum size
Border output
Set a horizontal display start position
Set display clock
Line counter
F_VSYNC
←“0”
←“1”
END
Enable CRT interrupt in synchronized
with the next V SYNC
Note: This routine is not interrupt
processing routine.
Fig. 5.1.3 Flowchart of initialization processing routine
7220 Group User’s Manual
5-3