7220 Datasheet, PDF (80/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

FUNCTIONAL DESCRIPTION
2.8 Multi-master I²C-BUS interface
(4) I²C Control Register (S1D: address 00DA16)
The I²C control register (address 00DA16) controls the data communication format.
s Bits 0 to 2: Bit counter (BC0–BC2)
These bits decide the number of bits for the next 1-byte data to be transmitted. An interrupt
request signal occurs immediately after the number of bits specified with these bits are transmitted.
When a START condition is received, these bits become “0002” and the address data is always
transmitted and received in 8 bits.
s Bit 3: I²C-BUS interface use enable bit (ESO)
This bit enables usage of the multi-master I²C-BUS interface. When this bit is set to “0,” the use
disable status is provided, so the SDA and the SCL become high-impedance. When the bit is set
to “1,” use of the interface is enabled.
When ESO = “0,” the following is performed.
• PIN = “1,” BB = “0” and AL = “0” are set (they are bits of the I²C status register at address
00F816).
• Writing data to the I²C data shift register (address 00D716) is disabled.
s Bit 4: Data format selection bit (ALS)
This bit decides whether or not to recognize slave addresses. When this bit is set to “0,” the
addressing format is selected, so that address data is recognized. When a match is found between
a slave address and address data as a result of comparison or when a general call (refer to “(5)
I²C Status Register,” bit 1) is received, transmission processing can be performed. When this bit
is set to “1,” the free data format is selected, so that slave addresses are not recognized.
s Bit 5: Addressing format selection bit (10BIT SAD)
This bit selects a slave address specification format. When this bit is set to “0,” the 7-bit addressing
format is selected. In this case, only the high-order 7 bits (slave address) of the I²C address
register (address 00D816) are compared with address data. When this bit is set to “1,” the 10-bit
addressing format is selected, all the bits of the I²C address register are compared with address
data.
s Bit 6 and 7: Connection control bits between I²C-BUS interface and ports (BSEL0, BSEL1)
This bits controls the connection between SCL and ports or SDA and ports. When using the ports
as multi-master I²C-BUS interface, set the corresponding bits of port P1 direction register to “1”
(output mode).
Figure 2.8.5 shows the connection port control by BSEL0 and BSEL1, Figure 2.8.6 shows the I²C
control register.
SCL
Multi-master
I²C-BUS
interface
SDA
“0”
“1” BSEL0
SCL1/P11
“0”
“1” BSEL1
SCL2/P12
“0”
“1” BSEL0
SDA1/P13
“0”
“1” BSEL1
SDA2/P14
Fig. 2.8.5 Connection port control by BSEL0 and BSEL1
7220 Group User’s Manual
2-53