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7220 Datasheet, PDF (116/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER
FUNCTIONAL DESCRIPTION
2.12 ROM correction function
2.12 ROM correction function
Only the M37221M8-XXXSP and the M37221MA-XXXSP have this function.
This can correct ROM program data in ROM. Up to 2 addresses (2 blocks) can be corrected, a program for
correction is stored in the ROM correction memory in RAM. The ROM memory for correction is 32 bytes !
2 blocks.
Block 1 : addresses 02C016 to 02DF16
Block 2 : addresses 02E016 to 02FF16
Set an address of the ROM data to be corrected into the ROM correction address register. When the value
of the counter matches the ROM data address in the ROM correction address, the main program branches
to the correction program stored in the ROM correction memory. To return from the correction program to
the main program, the op code and operand of the JMP instruction (total of 3 bytes) are necessary at the
end of the correction program. When the blocks 1 and 2 are used in series, the above instruction is not
needed at the end of the block 1.
The ROM correction function is controlled by the ROM correction enable register.
Notes 1 : Specify the first address (op code address) of each instruction as the ROM correction address.
2 : Use the JMP instruction (total of 3 bytes) to return from
the correction program to the main program.
3 : Do not set the same address to ROM correction addresses 1 and 2 (addresses to 021716 to
021A16).
ROM correction address 1 (high-order) 021716
ROM correction address 1 (low-order) 021816
ROM correction address 2 (high-order) 021916
ROM correction address 2 (low-order) 021A16
Fig. 2.12.1 ROM correction address registers
ROM Correction Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
00
ROM correction enable register (RCR) [Address 021216]
B
Name
0 Block 1 enable bit (RCR0)
1 Block 2 enable bit (RCR1)
2, 3 Fix these bits to “0.”
Functions
0: Disabled
1: Enabled
0: Disabled
1: Enabled
4 Nothing is assigned. These bits are write disable bits. When
to these bits are read out, the values are “0.”
7
After reset R W
0 RW
0 RW
0 R—
0 R—
Fig. 2.12.2 ROM correction enable register
7220 Group User’s Manual
2-89