7220 Datasheet, PDF (183/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
5.1 Example of multi-line display
(2) When setting multiple interrupts
Various priority processings are executed by enabling multiple interrupts and by setting priorities by
software. For example, to set the priority listed below;
ŒTimer 1 interrupt
VSYNC interrupt
ŽCRT interrupt
execute the following process:
Set only interrupt enable bits (ICON1, ICON2) whose priorities are higher than the current interrupt,
and enable the interrupt disable flag (I) in only the current interrupt processing routine.
Figure 5.1.9 shows the timing when all interrupt request bits (CRT, VSYNC, Timer 1) are “1” at the
same sampling point.
Note: When setting multiple interrupts, be sure to determine priority levels to prevent occurrence of
plural interrupts with the same priority level.
1
CRT interrupt request bit
0
1
VSYNC interrupt request bit
0
Timer 1 interrupt request bit ¹
0
CRT interrupt processing
VSYNC interrupt processing
Timer 1 interrupt processing
3
A
2
A’
(series of 3 )
(series of 3 )
B
(series of 2 )
B’
1
1’
Interrupt disable flag (I)
Fig. 5.1.9 Timing when all interrupt request bits are “1” at the same sampling point
5-10
7220 Group User’s Manual