7220 Datasheet, PDF (192/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
5.3 Usage example of ROM correction function (M37221M8/MA-XXXSP)
5.3.4 General flowchart
Figure 5.3.6 shows the general flowchart when using ROM correction function. E²PROM addresses in the
flowchart corresponds to E²PROM map (refer to “Figures 5.3.4 and 5.3.5”).
START
After reset release, read the data
from E²PROM
• ROM correction function 1 (address 000 16)
Valid/invalid
• ROM correction function 2 (address 023 16)
Valid/invalid
←5516: valid, others: invalid
Yes
No
Use ROM correction function 1 ?
• ROM correction address 1 (high-order)
address 021716← 00116 of E²PROM
• ROM correction address 1 (low-order)
address 021816← 00216 of E²PROM
ROM correction enable register
(b0 at address 021B 16^{)← “0” (disabled)}
Store execution address
into ROM correction address 1.
Disable block 1 enable bit.
address 02C016 to 02DF16
← 00316 to 02216 of E²PROM
Store correction codes of ROM
correction function 1 into ROM
correction memory 1 (block 1).
ROM correction enable register
(b0 at address 021B 16)← “1” (enabled) Enable block 1 enable bit.
Yes
No
Use ROM correction function 2 ?
• ROM correction address 2 (high-order)
address 021916← 02416 of E²PROM
• ROM correction address 1 (low-order)
address 021A16← 02516 of E²PROM
ROM correction enable register
(b1 at address 021B 16)← “0” (disabled)
Store execution address
into ROM correction address 2.
Disable block 2 enable bit.
address 02E0 16 to 02FF16
← 02616 to 04516 of E²PROM
Store correction codes of ROM
correction function 2 into ROM
correction memory 2 (block 2).
ROM correction enable register
(b1 at address 021B 16)← “1” (enabled) Enable block 2 enable bit.
END
Fig. 5.3.6 General flowchart when using ROM correction function
7220 Group User’s Manual
5-19