7220 Datasheet, PDF (32/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

FUNCTIONAL DESCRIPTION
2.1 Central processing unit
On-going routine
••••••••
Interrupt request
M(S) (PCH)
(S) (S)–1
M(S) (PCL)
(S) (S)–1
Subroutine
•
•
•
Execute RTS
(S) (S)+1
(PCL) M(S)
(S) (S)+1
(PCH) M(S)
Execute JSR
••••••••
M(S)
(S)
M(S)
(S)
M(S)
(S)
(PCH)
(S)–1
(PCL)
(S)–1
(PS)
(S)–1
Interrupt routine
•
•
•
Execute RTI
(S)
(PS)
(S)
(PCL)
(S)
(PCH)
(S)+1
M(S)
(S)+1
M(S)
(S)+1
M(S)
(PCH) : Contents of high-order 8 bits of program counter
(PCL) : Contents of low-order 8 bits of program counter
(PS) : Contents of processor status register
(S) : Contents of stack pointer
M : Memory
RTI : Instruction for returning from interrupt routine to main routine
RTS : Instruction for returning from subroutine to main routine
Fig. 2.1.3 Sequence of push onto/pop from a stack during interrupts and subroutine calls
7220 Group User’s Manual
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