7220 Datasheet, PDF (243/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPENDIX
6.6 SFR assignment
s2 Page Register Area (addresses 21716 to 21B16)
<Bit allocation >
:
: Name
Function bit
: No function bit
0 ^{: Fix this bit to “0”}
(do not write “1”)
1 : Fix this bit to “1”
(do not write “0”)
Address
Register
Bit allocation
b7
b0
21716
21816
21916
21A16
21B16
ROM correction address 1 (high-order)
ROM correction address 1 (low-order)
ROM correction address 2 (high-order)
ROM correction address 2 (low-order)
ROM correction enable register (RCR)
ADH17 ADH16 ADH15 ADH14 ADH13 ADH12 ADH11 ADH10
ADL17 ADL16 ADL15 ADL14 ADL13 ADL12 ADL11 ADL10
ADH27 ADH26 ADH25 ADH24 ADH23 ADH22 ADH21 ADH20
ADL27 ADL26 ADL25 ADL24 ADL23 ADL22 ADL21 ADL20
0 0 ^{RCR1 RCR0}
Note: Only M37221M8-XXXSP and M37221MA-XXXSP have this area.
Fig. 6.6.3 Memory map of 2 page register (including internal state immediately after reset and access characteristics) (3)
(only M37221M8-XXXSP and M37221MA-XXXSP)
6-24
7220 Group User’s Manual