7220 Datasheet, PDF (41/303 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

FUNCTIONAL DESCRIPTION
2.3 Memory assignment
sSFR Area (addresses E016 to FF16)
<Bit allocation >
:
: Name
Function bit
<State immediately after reset >
0 ^{: “0” immediately after reset}
1 : “1” immediately after reset
: No function bit
0 ^{: Fix this bit to “0”}
(do not write “1”)
? : Indeterminate immediately
after reset
1 : Fix this bit to “1”
(do not write “0”)
Address
Register
b7
E016 Horizontal position register (HR)
Bit allocation
State immediately after reset
b0 b7
b0
HR5 HR4 HR3 HR2 HR1 HR0
0016
E116 Vertical position register 1 (CV1)
E216 Vertical position register 2 (CV2)
E316
CV16 CV15 CV14 CV13 CV12 CV11 CV10 _{0 ? ? ? ? ? ? ?}
CV26 CV25 CV24 CV23 CV22 CV21 CV20 _{0 ? ? ? ? ? ? ?}
?
E416 Character size register (CS)
CS21 CS20 CS11 CS10 _{0 0 0 0 ? ? ? ?}
E516 Border selection register (MD)
MD20
MD10 _{0 0 0 0 0 ? 0 ?}
E616 Color register 0 (CO0)
CO07 CO06 CO05 CO04 CO03 CO02 CO01
0016
E716 Color register 1 (CO1)
CO17 CO16 CO15 CO14 CO13 CO12 CO11
0016
E816 Color register 2 (CO2)
CO27 CO26 CO25 CO24 CO23 CO22 CO21
0016
E916 Color register 3 (CO3)
CO37 CO36 CO35 CO34 CO33 CO32 CO31
0016
EA16 CRT control register (CC)
CC7
CC2 CC1 CC0
0016
EB16
?
EC16 CRT port control register (CRTP)
OP7 OP6 OP5 OUT1 OUT2 R/G/B VSYC HSYC
0016
ED16 CRT clock selection register (CK)
0 0 0 0 0 0 CK1 CK0
0016
EE16 A-D control register 1 (AD1)
EF16 A-D control register 2 (AD2)
ADM4
ADM2 ADM1 ADM0 _{0 0 0 ? 0 0 0 0}
ADC5 ADC4 ADC3 ADC2 ADC1 ADC0
0016
F016 Timer 1 (TM1)
FF16
F116
F216
F316
Timer 2 (TM2)
Timer 3 (TM3)
Timer 4 (TM4)
0716
FF16
0716
F416 Timer 12 mode register (T12M)
0 ^{T12M4 T12M3 T12M2 T12M1 T12M0}
0016
F516 Timer 34 mode register (T34M)
T34M5 T34M4 T34M3 T34M2 T34M1 T34M0
0016
F616 PWM5 register (PWM5)
?
F716
?
F816
?
F916 Interrupt input polarity register (RE)
FA16
FB16 CPU mode register (CPUM)
0
RE5 RCEK40 RE3 0 0
0016
1 1 1 1 1 ^CM2 0 0
0 00 00 0 0 ?
0016
? ?1 11 1 0 0
FC16 Interrupt request register 1 (IREQ1) ^{IT3R IICR VSCR CRTR TM4R TM3R TM2R TM1R}
0016
FD16 Interrupt request register 2 (IREQ2) 0
MCSKR0
S1R 1T2R 1T1R
0016
FE16 Interrupt control register 1 (ICON1)
IT3E IICE VSCE CRTE TM4E TM3E TM2E TM1E
0016
FF16 Interrupt control register 2 (ICON2)
0 0 0 ^MSE 0 ^{S1E 1T2E 1T1E}
0016
Fig. 2.3.4 Memory map of SFR (special function register) (2)
2-14
7220 Group User’s Manual