PIC16F946 Datasheet, PDF (96/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
7.2 Timer2 Interrupt
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
FIGURE 7-1:
TIMER2 BLOCK DIAGRAM
7.3 Timer2 Output
The output of TMR2 (before the postscaler) is fed to the
SSP module, which optionally uses it to generate the
shift clock.
TMR2
Output⁽¹⁾
Sets Flag
bit TMR2IF
FOSC/4
Prescaler
1:1, 1:4, 1:16
2
T2CKPS<1:0>
TMR2
Reset
Comparator
Postscaler
EQ ^{1:1 to 1:16}
PR2
4
TOUTPS<3:0>
Note 1: TMR2 register output can be software selected by the SSP module as a baud clock.
TABLE 7-1: REGISTERS ASSOCIATED WITH TIMER2
Addr Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
0Bh/ INTCON GIE
8Bh
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000x
0Ch PIR1
EEIF ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
11h TMR2 Holding Register for the 8-bit TMR2 Register
0000 0000 0000 0000
12h T2CON
— TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
8Ch PIE1
EEIE ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
92h PR2
Timer2 Period Register
1111 1111 1111 1111
Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
DS41265A-page 94
Preliminary
© 2005 Microchip Technology Inc.