PIC16F946 Datasheet, PDF (170/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
FIGURE 14-1:
SSP BLOCK DIAGRAM
(SPI MODE)
Read
Internal
Data Bus
Write
RC7/RX/
DT/SDI/
SDA/SEG8
SSPBUF reg
SSPSR reg
bit 0
RC4/T1G/ _{Peripheral OE}
SDO/SEG11
Shift
Clock
RA5/AN2/
C2OUT/SS/
SEG5
RC6/TX/CK/
SCK/ SCL/
SEG9
SS Control
Enable
Edge
Select
2
Clock Select
SSPM<3:0>
4
TMR2 Output
2
Edge
Select
TRISC<6>
Prescaler TCY
4, 16, 64
To enable the serial port, SSPEN bit (SSPCON<5>)
must be set. To reset or reconfigure SPI mode:
• Clear bit SSPEN
• Re-initialize the SSPCON register
• Set SSPEN bit
This configures the SDI, SDO, SCK and SS pins as
serial port pins. For the pins to behave in a serial port
function, they must have their data direction bits (in the
TRISC register) appropriately programmed. This is:
• SDI must have TRISC<7> set
• SDO must have TRISC<4> cleared
• SCK (Master mode) must have TRISC<6>
cleared
• SCK (Slave mode) must have TRISC<6> set
• SS must have TRISA<5> set.
.
Note 1: When the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
0100), the SPI module will reset if the SS
pin is set to VDD.
2: If the SPI is used in Slave mode with
CKE = 1, then the SS pin control must be
enabled.
3: When the SPI is in Slave mode with SS pin
control enabled (SSPCON<3:0> = 0100),
the state of the SS pin can affect the state
read back from the TRISC<4> bit. The
peripheral OE signal from the SSP module
into PORTC controls the state that is read
back from the TRISC<4> bit (see
Section 19.4 “DC Characteristics:
PIC16F946-I (Industrial), PIC16F946-E
(Extended)” for information on PORTC).
If read-modify-write instructions, such as
BSF, are performed on the TRISC register
while the SS pin is high, this will cause the
TRISC<4> bit to be set, thus disabling the
SDO output.
DS41265A-page 168
Preliminary
© 2005 Microchip Technology Inc.