PIC16F946 Datasheet, PDF (76/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
TABLE 4-1: OSCILLATOR DELAY EXAMPLES
System Clock
Source
Frequency
Switching From
Oscillator Delay
(TOST)
Comments
LFIOSC
HFIOSC
XT or HS
LP
LP with T1OSC
enabled
EC, RC
EC, RC
31 kHz
125 kHz-8 MHz
4-20 MHz
32 kHz
32 kHz
0-20 MHz
0-20 MHz
Sleep
10 μs internal delay Following a wake-up from Sleep mode
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
Sleep
10 μs internal delay Following a wake-up from Sleep mode
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
INTOSC or Sleep 1024 clock cycles Following a change from INTOSC, an
OST of 1024 cycles must occur.
INTOSC or Sleep
1024 clock cycles
Following a change from INTOSC, an
OST of 1024 cycles must occur. See
Section 4.3.1.1 “Special Case” for
special case conditions.
Sleep
10 μs internal delay Following a wake-up from Sleep mode,
an internal delay is invoked to allow the
memory bias to stabilize before
program execution can begin. See
Section 4.3.1.1 “Special Case” for
details about this special case.
Sleep
10 μs internal delay Following a wake-up from Sleep mode
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
LFIOSC
10 μs internal delay Following a switch from a LFIOSC or
POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
DS41265A-page 74
Preliminary
© 2005 Microchip Technology Inc.