PIC16F946 Datasheet, PDF (158/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
FIGURE 12-4:
ANALOG INPUT MODEL
RS ^ANx
VDD
VT = 0.6V
VA
CPIN
5 pF
VT = 0.6V
Sampling
Switch
RIC ≤ 1k SS RSS
I LEAKAGE
± 500 nA
CHOLD
= DAC capacitance
= 10 pF
VSS
Legend: CPIN
= Input Capacitance
VT
= Threshold Voltage
I LEAKAGE = Leakage current at the pin due to
various junctions
RIC
= Interconnect Resistance
SS
= Sampling Switch
CHOLD = Sample/Hold Capacitance (from DAC)
6V
5V
RSS
VDD 4V
3V
2V
5 6 7 8 9 10 11
Sampling Switch
(kΩ)
12.3 A/D Operation During Sleep
The A/D converter module can operate during Sleep.
This requires the A/D clock source to be set to the
internal oscillator. When the RC clock source is
selected, the A/D waits one instruction before starting
the conversion. This allows the SLEEP instruction to be
executed, thus eliminating much of the switching noise
from the conversion. When the conversion is complete,
the GO/DONE bit is cleared and the result is loaded
into the ADRESH:ADRESL registers. If the A/D
FIGURE 12-5:
A/D TRANSFER FUNCTION
interrupt is enabled, the device awakens from Sleep. If
the GIE bit (INTCON<7>) is set, the program counter is
set to the interrupt vector (0004h). If GIE is clear, the
next instruction is executed. If the A/D interrupt is not
enabled, the A/D module is turned off, although the
ADON bit remains set.
When the A/D clock source is something other than
RC, a SLEEP instruction causes the present conversion
to be aborted, and the A/D module is turned off. The
ADON bit remains set.
3FFh
3FEh
3FDh
3FCh
3FBh
Full-Scale Range
1 LSB Ideal
1/2 LSB Ideal
004h
003h
002h
001h
000h
Zero-Scale
Full-Scale
Transition
1/2 LSB Ideal
Zero-Scale
Transition
Center of
Full-Scale Code
Analog Input
DS41265A-page 156
Preliminary
© 2005 Microchip Technology Inc.