PIC16F946 Datasheet, PDF (24/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
2.2.2.6 PIR1 Register
The PIR1 register contains the interrupt flag bits, as
shown in Register 2-6.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to enabling
an interrupt.
REGISTER 2-6:
PIR1 – PERIPHERAL INTERRUPT REQUEST REGISTER 1 (ADDRESS: 0Ch)
R/W-0 R/W-0
R-0
R-0
R/W-0
R/W-0 R/W-0 R/W-0
EEIF
ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
bit 7
bit 0
bit 7
EEIF: EE Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation has not completed or has not started
bit 6
ADIF: A/D Converter Interrupt Flag bit
1 = The A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
bit 5
RCIF: USART Receive Interrupt Flag bit
1 = The USART receive buffer is full (cleared by reading RCREG)
0 = The USART receive buffer is not full
bit 4
TXIF: USART Transmit Interrupt Flag bit
1 = The USART transmit buffer is empty (cleared by writing to TXREG)
0 = The USART transmit buffer is full
bit 3
SSPIF: Synchronous Serial Port (SSP) Interrupt Flag bit
1 = The Transmission/Reception is complete (must be cleared in software)
0 = Waiting to Transmit/Receive
bit 2
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Unused in this mode
bit 1
TMR2IF: TMR2 to PR2 Interrupt Flag bit
1 = A TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
bit 0
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = The TMR1 register overflowed (must be cleared in software)
0 = The TMR1 register did not overflow
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS41265A-page 22
Preliminary
© 2005 Microchip Technology Inc.