PIC16F946 Datasheet, PDF (184/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
FIGURE 14-12: CLOCK SYNCHRONIZATION TIMING
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
SDA
DX
DX-1
SCL
CKP
WR
SSPCON
Master device
asserts clock
Master device
deasserts clock
TABLE 14-4: REGISTERS ASSOCIATED WITH I²C™ OPERATION
Address Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
0Bh, 8Bh, INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000x
10Bh,18Bh
0Ch
PIR1
EEIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
8Ch
PIE1
EEIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
13h
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx uuuu uuuu
14h
SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000
87h
TRISC PORTC Data Direction Register
93h
SSPADD Synchronous Serial Port (I²C™ mode) Address Register
1111 1111 1111 1111
0000 0000 0000 0000
94h
SSPSTAT SMP⁽¹⁾ CKE⁽¹⁾ D/A
P
S
R/W UA
BF 0000 0000 0000 0000
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by SSP
module in I²C mode.
Note 1: Maintain these bits clear in I²C mode.
DS41265A-page 182
Preliminary
© 2005 Microchip Technology Inc.