PIC16F946 Datasheet, PDF (186/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
REGISTER 15-1:
CCP1CON – CCP2CON⁽¹⁾ REGISTER (ADDRESS: 17h/1Dh)
U-0
U-0
R/W-0 R/W-0
R/W-0
R/W-0
—
—
CCPxX CCPxY CCPxM3 CCPxM2
bit 7
R/W-0
CCPxM1
R/W-0
CCPxM0
bit 0
bit 7-6
bit 5-4
bit 3-0
Unimplemented: Read as ‘0’
CCPxX:CCPxY: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM<3:0>: CCPx Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit is set)
1001 = Compare mode, clear output on match (CCPxIF bit is set)
1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is
unaffected)
1011 = Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected);
CCP1 resets TMR1; CCP2 resets TMR1 and starts an A/D conversion (if A/D module
is enabled)
11xx = PWM mode
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS41265A-page 184
Preliminary
© 2005 Microchip Technology Inc.