PIC16F946 Datasheet, PDF (145/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
FIGURE 11-7:
RC7/RX/DT/
SDI/SDA/SEG8
Load RSR
Read
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
Start
bit bit 0 bit 1
Start
bit 8 Stop bit bit 0
bit
bit 8 Stop
bit
bit 8 = 0, Data Byte
bit 8 = 1, Address Byte
Word 1
RCREG
RCIF
Note: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN = 1.
FIGURE 11-8:
RC7/RX/DT/
SDI/SDA/SEG8
Load RSR
Read
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
Start
bit bit 0 bit 1
Start
bit 8 Stop bit bit 0
bit
bit 8 Stop
bit
bit 8 = 1, Address Byte
bit 8 = 0, Data Byte
Word 1
RCREG
RCIF
Note: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN was not updated and still = 0.
TABLE 11-7: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Address Name
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
Resets
0Bh, 8Bh, INTCON GIE
10Bh,18Bh
PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000x
0Ch
PIR1
EEIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
18h
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x
1Ah
RCREG USART Receive Data Register
0000 0000 0000 0000
8Ch
PIE1
EEIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
98h
TXSTA
CSRC TX9 TXEN SYNC —
BRGH TRMT TX9D 0000 -010 0000 -010
99h
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, – = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
© 2005 Microchip Technology Inc.
Preliminary
DS41265A-page 143