PIC16F946 Datasheet, PDF (190/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
15.3.3 SETUP FOR PWM OPERATION
The following steps should be taken when configuring
the CCP module for PWM operation:
1. Set the PWM period by writing to the PR2
register.
2. Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
3. Make the RC5/T1CKI/CCP1/SEG10 pin an
output by clearing the TRISC<5> bit.
4. Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
5. Configure the CCP1 module for PWM operation.
TABLE 15-1: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz
PWM Frequency
1.22 kHz 4.88 kHz 19.53 kHz 78.12kHz 156.3 kHz
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
16
0xFFh
10
4
0xFFh
10
1
0xFFh
10
1
0x3Fh
8
1
0x1Fh
7
208.3 kHz
1
0x17h
5.5
TABLE 15-2: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Address Name
Bit 7 Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
0Bh,8Bh, INTCON
10Bh, 18Bh
0Ch
PIR1
0Dh
PIR2
8Ch
PIE1
8Dh
PIE2
87h
TRISC
0Eh
TMR1L
0Fh
TMR1H
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000x
EEIF ADIF RCIF
TXIF SSPIF CCP1IF TMR2IF
OSFIF C2IF
C1IF
LCDIF
—
LVDIF
—
EEIE ADIE RCIE
TXIE SSPIE CCP1IE TMR2IE
OSFIE C2IE
C1IE LCDIE
—
LVDIE
—
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
TMR1IF 0000 0000 0000 0000
CCP2IF 0000 -0-0 0000 -0-0
TMR1IE 0000 0000 0000 0000
CCP2IE 0000 -0-0 0000 -0-0
TRISC0 1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
10h
15h
16h
17h
1Bh
1Ch
1Dh
Legend:
T1CON T1GINV T1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu
CCPR1L Capture/Compare/PWM Register1 (LSB)
xxxx xxxx uuuu uuuu
CCPR1H Capture/Compare/PWM Register1 (MSB)
xxxx xxxx uuuu uuuu
CCP1CON —
—
CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
CCPR2L Capture/Compare/PWM Register 2 (LSB)
xxxx xxxx uuuu uuuu
CCPR2H Capture/Compare/PWM Register 2 (MSB)
xxxx xxxx uuuu uuuu
CCP2CON —
—
CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by Capture and Timer1.
DS41265A-page 188
Preliminary
© 2005 Microchip Technology Inc.