PIC16F946 Datasheet, PDF (17/274 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F946
TABLE 2-3: PIC16F946 SPECIAL REGISTERS SUMMARY BANK 2
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR/BOR
Reset
Value on
all other
Resets⁽¹⁾
Bank 2
100h INDF
Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx xxxx xxxx
101h TMR0
Timer0 Module Register
xxxx xxxx uuuu uuuu
102h PCL
Program Counter’s (PC) Least Significant Byte
0000 0000 0000 0000
103h STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx 000q quuu
104h FSR
Indirect Data Memory Address Pointer
xxxx xxxx uuuu uuuu
105h WDTCON
106h PORTB
—
—
—
WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN ---0 1000 ---0 1000
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0 xxxx xxxx uuuu uuuu
107h LCDCON
108h LCDPS
LCDEN SLPEN WERR VLCDEN
CS1
WFT BIASMD LCDA
WA
LP3
CS0
LMUX1 LMUX0 0001 0011 0001 0011
LP2
LP1
LP0 0000 0000 0000 0000
109h LVDCON
10Ah PCLATH
—
—
IRVST LVDEN
—
LVDL2
LVDL1
LVDL0 --00 -100 --00 -100
—
—
—
Write Buffer for the upper 5 bits of the Program Counter ---0 0000 ---0 0000
10Bh INTCON
10Ch EEDATL
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000x
EEDATL7 EEDATL6 EEDATL5 EEDATL4 EEDATL3 EEDATL2 EEDATL1 EEDATL0 0000 0000 0000 0000
10Dh EEADRL
10Eh EEDATH
EEADRL7 EEADRL6 EEADRL5 EEADRL4 EEADRL3 EEADRL2 EEADRL1 EEADRL0 0000 0000 0000 0000
—
—
EEDATH5 EEDATH4 EEDATH3 EEDATH2 EEDATH1 EEDATH0 --00 0000 --00 0000
10Fh EEADRH
110h LCDDATA0
—
SEG7
COM0
—
SEG6
COM0
—
SEG5
COM0
EEADRH4 EEADRH3 EEADRH2 EEADRH1 EEADRH0 ---0 0000 ---0 0000
SEG4
COM0
SEG3
COM0
SEG2
COM0
SEG1
COM0
SEG0 xxxx xxxx uuuu uuuu
COM0
111h LCDDATA1
SEG15
COM0
SEG14
COM0
SEG13
COM0
SEG12
COM0
SEG11
COM0
SEG10
COM0
SEG9
COM0
SEG8 xxxx xxxx uuuu uuuu
COM0
112h LCDDATA2
SEG23
COM0
SEG22
COM0
SEG21
COM0
SEG20
COM0
SEG19
COM0
SEG18
COM0
SEG17
COM0
SEG16 xxxx xxxx uuuu uuuu
COM0
113h LCDDATA3
SEG7
COM1
SEG6
COM1
SEG5
COM1
SEG4
COM1
SEG3
COM1
SEG2
COM1
SEG1
COM1
SEG0 xxxx xxxx uuuu uuuu
COM1
114h LCDDATA4
SEG15
COM1
SEG14
COM1
SEG13
COM1
SEG12
COM1
SEG11
COM1
SEG10
COM1
SEG9
COM1
SEG8 xxxx xxxx uuuu uuuu
COM1
115h LCDDATA5
SEG23
COM1
SEG22
COM1
SEG21
COM1
SEG20
COM1
SEG19
COM1
SEG18
COM1
SEG17
COM1
SEG16 xxxx xxxx uuuu uuuu
COM1
116h LCDDATA6
SEG7
COM2
SEG6
COM2
SEG5
COM2
SEG4
COM2
SEG3
COM2
SEG2
COM2
SEG1
COM2
SEG0 xxxx xxxx uuuu uuuu
COM2
117h LCDDATA7
SEG15
COM2
SEG14
COM2
SEG13
COM2
SEG12
COM2
SEG11
COM2
SEG10
COM2
SEG9
COM2
SEG8 xxxx xxxx uuuu uuuu
COM2
118h LCDDATA8
SEG23
COM2
SEG22
COM2
SEG21
COM2
SEG20
COM2
SEG19
COM2
SEG18
COM2
SEG17
COM2
SEG16 xxxx xxxx uuuu uuuu
COM2
119h LCDDATA9
SEG7
COM3
SEG6
COM3
SEG5
COM3
SEG4
COM3
SEG3
COM3
SEG2
COM3
SEG1
COM3
SEG0 xxxx xxxx uuuu uuuu
COM3
11Ah LCDDATA10
SEG15
COM3
SEG14
COM3
SEG13
COM3
SEG12
COM3
SEG11
COM3
SEG10
COM3
SEG9
COM3
SEG8 xxxx xxxx uuuu uuuu
COM3
11Bh LCDDATA11
11Ch LCDSE0⁽²⁾
11Dh LCDSE1⁽²⁾
11Eh LCDSE2⁽²⁾
SEG23
COM3
SE7
SE15
SE23
SEG22
COM3
SE6
SE14
SE22
SEG21
COM3
SE5
SE13
SE21
SEG20
COM3
SE4
SE12
SE20
SEG19
COM3
SE3
SE11
SE19
SEG18
COM3
SE2
SE10
SE18
SEG17
COM3
SE1
SE9
SE17
SEG16
COM3
SE0
SE8
SE16
xxxx xxxx uuuu uuuu
0000 0000 uuuu uuuu
0000 0000 uuuu uuuu
0000 0000 uuuu uuuu
11Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
This register is only initialized by a POR or BOR reset and is unchanged by other Resets.
© 2005 Microchip Technology Inc.
Preliminary
DS41265A-page 15