PIC18F2480_09 Datasheet, PDF (75/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
FIGURE 6-6:
BSR<3:0>
= 0000
= 0001
= 0010
= 0011
= 0100
= 0101
= 0110
= 0111
= 1000
= 1001
= 1010
= 1011
= 1100
= 1101
= 1110
= 1111
DATA MEMORY MAP FOR PIC18F2580/4580 DEVICES
Data Memory Map
00h
Bank 0
FFh
00h
Bank 1
FFh
00h
Bank 2
FFh
00h
Bank 3
FFh
00h
Bank 4
FFh
00h
Bank 5
FFh
00h
Bank 6
Access RAM
GPR
GPR
GPR
GPR
GPR
GPR
000h
05Fh
060h
0FFh
100h
1FFh
200h
2FFh
300h
3FFh
400h
4FFh
500h
5FFh
600h
FFh
00h
Bank 7
6FFh
700h
FFh
00h
Bank 8
7FFh
800h
FFh
00h
Bank 9
FFh
00h
Bank 10
Unimplemented
Read as ‘0’
8FFh
900h
9FFh
A00h
FFh
00h
Bank 11
AFFh
B00h
FFh
Bank 12 ^00h
BFFh
C00h
FFh
Bank 13 ^00h
FFh
00h
Bank 14
CAN SFRs
CAN SFRs
CFFh
D00h
DFFh
E00h
FFh
00h
Bank 15
FFh
CAN SFRs
SFR
EFFh
F00h
F5Fh
F60h
FFFh
When a = 0:
The BSR is ignored and the
Access Bank is used.
The first 128 bytes are
general purpose RAM
(from Bank 0).
The second 128 bytes are
Special Function Registers
(from Bank 15).
When a = 1:
The BSR specifies the Bank
used by the instruction.
Access Bank
00h
Access RAM Low
5Fh
Access RAM High ^60h
(SFRs)
FFh
© 2009 Microchip Technology Inc.
DS39637D-page 75