PIC18F2480_09 Datasheet, PDF (142/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
TABLE 11-5: PORTC I/O SUMMARY
Pin Name Function I/O TRIS Buffer
Description
RC0/T1OSO/
RC0 OUT
0
T13CKI
IN
1
DIG LATC<0> data output.
ST PORTC<0> data input.
T1OSO OUT x
ANA Timer1 oscillator output – overrides the TRIS<0> control when enabled.
T13CKI IN
1
ST Timer1/Timer3 clock input.
RC1/T1OSI
RC1 OUT 0
DIG LATC<1> data output.
IN
1
ST PORTC<1> data input.
T1OSI IN
x
ANA Timer1 oscillator input – overrides the TRIS<1> control when enabled.
RC2/CCP1
RC2 OUT 0
DIG LATC<2> data output.
IN
1
ST PORTC<2> data input.
CCP1 OUT 0
DIG CCP1 compare output.
IN
1
ST CCP1 capture input.
RC3/SCK/SCL RC3 OUT 0
DIG LATC<3> data output.
IN
1
ST PORTC<3> data input.
SCK OUT 0
DIG SPI clock output (MSSP module) – must have TRIS set to ‘1’ to allow
MSSP module to control the bidirectional communication.
IN
1
ST SPI clock input (MSSP module).
SCL OUT 0
DIG I²C™/SM bus clock output (MSSP module) – must have TRIS set to ‘1’ to
allow MSSP module to control the bidirectional communication.
IN
1 I²C™/SMB I²C/SM bus clock input.
RC4/SDI/SDA RC4 OUT 0
DIG LATC<4> data output.
IN
1
ST PORTC<4> data input.
SDI
IN
1
ST SPI data input (MSSP module).
SDA OUT 1
DIG I²C/SM bus data output (MSSP module) – must have TRIS set to ‘1’ to
allow MSSP module to control the bidirectional communication.
IN
1
I²C/SMB I²C/SM bus data input (MSSP module) – must have TRIS set to ‘1’ to
allow MSSP module to control the bidirectional communication.
RC5/SDO
RC5 OUT 0
DIG LATC<5> data output.
IN
1
ST PORTC<5> data input.
SDO OUT 0
DIG SPI data output (MSSP module).
RC6/TX/CK
RC6 OUT 0
DIG LATC<6> data output.
IN
1
ST PORTC<6> data input.
TX
OUT 0
DIG EUSART data output.
CK
OUT
1
DIG EUSART synchronous clock output – must have TRIS set to ‘1’ to enable
EUSART to control the bidirectional communication.
IN
1
ST EUSART synchronous clock input.
RC7/RX/DT
RC7 OUT 0
DIG LATC<7> data output.
IN
1
ST PORTC<7> data input.
RX
IN
1
ST EUSART asynchronous data input.
DT
OUT 1
DIG EUSART synchronous data output – must have TRIS set to ‘1’ to enable
EUSART to control the bidirectional communication.
IN
1
ST EUSART synchronous data input.
Legend: OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input
TABLE 11-6: SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PORTC
RC7
RC6
RC5
RC4
RC3
RC2
RC1
LATC
LATC Output Latch Register
TRISC
PORTC Data Direction Register
Bit 0
RC0
Reset
Values
on Page:
58
58
58
DS39637D-page 142
© 2009 Microchip Technology Inc.