PIC18F2480_09 Datasheet, PDF (446/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
FIGURE 28-11:
RE2/CS
PARALLEL SLAVE PORT TIMING (PIC18F4480/4580)
RE0/RD
RE1/WR
RD<7:0>
65
64
62
63
TABLE 28-13: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F4480/4580)
Param.
No.
Symbol
Characteristic
Min Max Units Conditions
62
TDTV2WRH Data In Valid before WR ↑ or CS ↑ (setup time)
20 — ns
63
TWRH2DTI WR ↑ or CS ↑ to Data–In Invalid
(hold time)
PIC18FXXXX 20 — ns
PIC18LFXXXX 35 — ns VDD = 2.0V
64
TRDL2DTV RD ↓ and CS ↓ to Data–Out Valid
— 80 ns
65
TRDH2DTI RD ↑ or CS ↓ to Data–Out Invalid
10 30 ns
66
TIBFINH Inhibit of the IBF Flag bit being Cleared from WR ↑ or CS ↑ — 3 TCY
DS39637D-page 446
© 2009 Microchip Technology Inc.