PIC18F2480_09 Datasheet, PDF (189/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
17.4.9 SETUP FOR PWM OPERATION
The following steps should be taken when configuring
the ECCP module for PWM operation:
1. Configure the PWM pins, P1A and P1B (and
P1C and P1D, if used), as inputs by setting the
corresponding TRIS bits.
2. Set the PWM period by loading the PR2 register.
3. Configure the ECCP1 module for the desired
PWM mode and configuration by loading the
ECCP1CON register with the appropriate
values:
• Select one of the available output
configurations and direction with the
EPWM1M<1:0> bits.
• Select the polarities of the PWM output
signals with the ECCP1M<3:0> bits.
4. Set the PWM duty cycle by loading the
ECCPR1L register and ECCP1CON<5:4> bits.
5. For Half-Bridge Output mode, set the
dead-band delay by loading ECCP1DEL<6:0>
with the appropriate value.
6. If auto-shutdown operation is required, load the
ECCP1AS register:
• Select the auto-shutdown sources using the
ECCPAS<2:0> bits.
• Select the shutdown states of the PWM
output pins using PSSAC<1:0> and
PSSBD<1:0> bits.
• Set the ECCPASE bit (ECCP1AS<7>).
• Configure the comparators using the CMCON
register.
• Configure the comparator inputs as analog
inputs.
7. If auto-restart operation is required, set the
PRSEN bit (ECCP1DEL<7>).
8. Configure and start TMR2:
• Clear the TMR2 interrupt flag bit by clearing
the TMR2IF bit (PIR1<1>).
• Set the TMR2 prescale value by loading the
T2CKPS bits (T2CON<1:0>).
• Enable Timer2 by setting the TMR2ON bit
(T2CON<2>).
9. Enable PWM outputs after a new PWM cycle
has started:
• Wait until TMRn overflows (TMRnIF bit is set).
• Enable the ECCP1/P1A, P1B, P1C and/or
P1D pin outputs by clearing the respective
TRIS bits.
• Clear the ECCPASE bit (ECCP1AS<7>).
17.4.10 EFFECTS OF A RESET
Both Power-on Reset and subsequent Resets will force
all ports to Input mode and the CCP registers to their
Reset states.
This forces the Enhanced CCP module to reset to a
state compatible with the standard CCP module.
© 2009 Microchip Technology Inc.
DS39637D-page 189