PIC18F2480_09 Datasheet, PDF (322/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
REGISTER 24-57: PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
Mode 0
R/W-0
IRXIE
R/W-0
WAKIE
R/W-0
ERRIE
R/W-0
R/W-0
R/W-0
TXB2IE TXB1IE⁽¹⁾ TXB0IE⁽¹⁾
R/W-0
RXB1IE
R/W-0
RXB0IE
Mode 1
R/W-0
IRXIE
bit 7
R/W-0
WAKIE
R/W-0
ERRIE
R/W-0
R/W-0
R/W-0
TXBnIE TXB1IE⁽¹⁾ TXB0IE⁽¹⁾
R/W-0
RXBnIE
R/W-0
FIFOWMIE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
IRXIE: CAN Bus Error Message Received Interrupt Enable bit
1 = Enable invalid message received interrupt
0 = Disable invalid message received interrupt
bit 6
WAKIE: CAN bus Activity Wake-up Interrupt Enable bit
1 = Enable bus activity wake-up interrupt
0 = Disable bus activity wake-up interrupt
bit 5
ERRIE: CAN bus Error Interrupt Enable bit
1 = Enable CAN module error interrupt
0 = Disable CAN module error interrupt
bit 4
When CAN is in Mode 0:
TXB2IE: CAN Transmit Buffer 2 Interrupt Enable bit
1 = Enable Transmit Buffer 2 interrupt
0 = Disable Transmit Buffer 2 interrupt
When CAN is in Mode 1 or 2:
TXBnIE: CAN Transmit Buffer Interrupts Enable bit
1 = Enable transmit buffer interrupt; individual interrupt is enabled by TXBIE and BIE0
0 = Disable all transmit buffer interrupts
bit 3
TXB1IE: CAN Transmit Buffer 1 Interrupt Enable bit⁽¹⁾
1 = Enable Transmit Buffer 1 interrupt
0 = Disable Transmit Buffer 1 interrupt
bit 2
TXB0IE: CAN Transmit Buffer 0 Interrupt Enable bit⁽¹⁾
1 = Enable Transmit Buffer 0 interrupt
0 = Disable Transmit Buffer 0 interrupt
bit 1
When CAN is in Mode 0:
RXB1IE: CAN Receive Buffer 1 Interrupt Enable bit
1 = Enable Receive Buffer 1 interrupt
0 = Disable Receive Buffer 1 interrupt
When CAN is in Mode 1 or 2:
RXBnIE: CAN Receive Buffer Interrupts Enable bit
1 = Enable receive buffer interrupt; individual interrupt is enabled by BIE0
0 = Disable all receive buffer interrupts
bit 0
When CAN is in Mode 0:
RXB0IE: CAN Receive Buffer 0 Interrupt Enable bit
1 = Enable Receive Buffer 0 interrupt
0 = Disable Receive Buffer 0 interrupt
When CAN is in Mode 1:
Unimplemented: Read as ‘0’
When CAN is in Mode 2:
FIFOWMIE: FIFO Watermark Interrupt Enable bit
1 = Enable FIFO watermark interrupt
0 = Disable FIFO watermark interrupt
Note 1: In CAN Mode 1 and 2, these bits are forced to ‘0’.
DS39637D-page 322
© 2009 Microchip Technology Inc.