PIC18F2480_09 Datasheet, PDF (150/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
FIGURE 11-3:
PARALLEL SLAVE PORT WRITE WAVEFORMS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
FIGURE 11-4:
PARALLEL SLAVE PORT READ WAVEFORMS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
TABLE 11-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTD⁽¹⁾
LATD⁽¹⁾
TRISD⁽¹⁾
PORTE⁽¹⁾
LATE⁽¹⁾
TRISE⁽¹⁾
RD7
RD6
RD5
LATD Output Latch Register
PORTD Data Direction Register
—
—
—
—
—
—
IBF
OBF
IBOV
RD4
—
—
PSPMODE
RD3
RD2
RD1
RD0
RE3
RE2
RE1
RE0
—
LATE Output Latch Register
—
TRISE2 TRISE1 TRISE0
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE TMR0IF INT0IF
RBIF
PIR1
PSPIF
ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
PIE1
PSPIE
ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
IPR1
PSPIP
ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP
ADCON1
—
CMCON⁽¹⁾ C2OUT
—
C1OUT
VCFG1
C2INV
VCFG0
C1INV
PCFG3
CIS
PCFG2
CM2
PCFG1
CM1
PCFG0
CM0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Note 1: These registers are available on PIC18F4X80 devices only.
Reset
Values
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DS39637D-page 150
© 2009 Microchip Technology Inc.