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PIC18F2480_09 Datasheet, PDF (175/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PIC18F2480/2580/4480/4580
TABLE 16-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE TMR0IF INT0IF
RBIF
55
RCON
IPEN SBOREN(2)
—
RI
TO
PD
POR
BOR
56
PIR1
PSPIF
ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
58
PIE1
PSPIE
ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
58
IPR1
PSPIP
ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP
58
TRISB
PORTB Data Direction Register
58
TRISC
PORTC Data Direction Register
58
TMR2
Timer2 Register
56
PR2
Timer2 Period Register
56
T2CON
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 56
CCPR1L
Capture/Compare/PWM Register 1 Low Byte
57
CCPR1H
Capture/Compare/PWM Register 1 High Byte
57
CCP1CON
—
—
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 57
ECCPR1L(1) Enhanced Capture/Compare/PWM Register 1 Low Byte
57
ECCPR1H(1) Enhanced Capture/Compare/PWM Register 1 High Byte
57
ECCP1CON(1) EPWM1M1 EPWM1M0 EDC1B1 EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0 57
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1: These registers are unimplemented on PIC18F2X80 devices.
2: The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See
Section 5.4 “Brown-out Reset (BOR)”.
© 2009 Microchip Technology Inc.
DS39637D-page 175