PIC18F2480_09 Datasheet, PDF (249/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
FIGURE 19-12: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RC7/RX/DT pin
bit 0
bit 1
bit 2
bit 6
bit 7
RC6/TX/CK pin
Write to
TXREG reg
TXIF bit
TRMT bit
TXEN bit
TABLE 19-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
55
PIR1
PSPIF⁽¹⁾ ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
58
PIE1
PSPIE⁽¹⁾ ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
58
IPR1
PSPIP⁽¹⁾ ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP
58
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
57
TXREG
EUSART Transmit Register
57
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
57
BAUDCON ABDOVF RCIDL
—
SCKP BRG16
—
WUE ABDEN
57
SPBRGH EUSART Baud Rate Generator Register, High Byte
57
SPBRG
EUSART Baud Rate Generator Register, Low Byte
57
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.
Note 1: Reserved in PIC18F2X80 devices; always maintain these bits clear.
© 2009 Microchip Technology Inc.
DS39637D-page 249