PIC18F2480_09 Datasheet, PDF (442/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
FIGURE 28-6:
OSC1
CLKO AND I/O TIMING
Q4
Q1
10
CLKO
13
14
I/O pin
(Input)
17
I/O pin
(Output)
Old Value
Note:
20, 21
Refer to Figure 28-4 for load conditions.
Q2
19
18
15
Q3
11
12
16
New Value
TABLE 28-9: CLKO AND I/O TIMING REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ
Max Units Conditions
10
TOSH2CKL OSC1 ↑ to CLKO ↓
—
75
200
ns (Note 1)
11
TOSH2CK OSC1 ↑ to CLKO ↑
H
—
75
200
ns (Note 1)
12
TCKR
CLKO Rise Time
—
35
100
ns (Note 1)
13
TCKF
CLKO Fall Time
—
35
100
ns (Note 1)
14
TCKL2IOV CLKO ↓ to Port Out Valid
—
— 0.5 TCY + 20 ns (Note 1)
15
TIOV2CKH Port In Valid before CLKO ↑
0.25 TCY + 25 —
—
ns (Note 1)
16
TCKH2IOI Port In Hold after CLKO ↑
0
—
—
ns (Note 1)
17
TOSH2IOV OSC1 ↑ (Q1 cycle) to Port Out Valid
—
50
150
ns
18
TOSH2IOI OSC1 ↑ (Q2 cycle) to Port PIC18FXXXX
100
—
—
ns
18A
Input Invalid (I/O in hold _PIC18LFXXXX
200
—
—
ns VDD = 2.0V
time)
19
TIOV2OSH Port Input Valid to OSC1 ↑ (I/O in
setup time)
0
—
—
ns
20
TIOR
Port Output Rise Time PIC18FXXXX
—
10
25
ns
20A
PIC18LFXXXX
—
—
60
ns VDD = 2.0V
21
TIOF
Port Output Fall Time PIC18FXXXX
—
10
25
ns
21A
PIC18LFXXXX
—
—
60
ns VDD = 2.0V
22† TINP
INTx Pin High or Low Time
TCY
—
—
ns
23† TRBP
RB<7:4> Change INTx High or Low Time
TCY
—
—
ns
24† TRCP
RC<7:4> Change INTx High or Low Time
20
ns
† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC mode, where CLKO output is 4 x TOSC.
DS39637D-page 442
© 2009 Microchip Technology Inc.