PIC18F2480_09 Datasheet, PDF (475/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
INDEX
A
A/D ................................................................................... 253
A/D Converter Interrupt, Configuring ....................... 257
Acquisition Requirements ........................................ 258
ADCON0 Register .................................................... 253
ADCON1 Register .................................................... 253
ADCON2 Register .................................................... 253
ADRESH Register ............................................ 253, 256
ADRESL Register .................................................... 253
Analog Port Pins, Configuring .................................. 260
Associated Registers ............................................... 262
Automatic Acquisition Time ...................................... 259
Calculating the Minimum Required
Acquisition Time .............................................. 258
Configuring the Module ............................................ 257
Conversion Clock (TAD) Selection ........................... 259
Conversion Status (GO/DONE Bit) .......................... 256
Conversions ............................................................. 261
Converter Characteristics ........................................ 456
Operation in Power-Managed Modes ...................... 260
Special Event Trigger (CCP) .................................... 262
Special Event Trigger (ECCP) ................................. 178
Use of the CCP1 Trigger .......................................... 262
Absolute Maximum Ratings ............................................. 421
AC (Timing) Characteristics ............................................. 438
Load Conditions for Device Timing
Specifications ................................................... 439
Parameter Symbology ............................................. 438
Temperature and Voltage Specifications ................. 439
Timing Conditions .................................................... 439
Access Bank ...................................................................... 76
Mapping with Indexed Literal Offset Mode ............... 100
ACKSTAT ........................................................................ 221
ACKSTAT Status Flag ..................................................... 221
ADCON0 Register ............................................................ 253
GO/DONE Bit ........................................................... 256
ADCON1 Register ............................................................ 253
ADCON2 Register ............................................................ 253
ADDFSR .......................................................................... 410
ADDLW ............................................................................ 373
ADDULNK ........................................................................ 410
ADDWF ............................................................................ 373
ADDWFC ......................................................................... 374
ADRESH Register ............................................................ 253
ADRESL Register .................................................... 253, 256
Analog-to-Digital Converter. See A/D.
and BSR ........................................................................... 100
ANDLW ............................................................................ 374
ANDWF ............................................................................ 375
Assembler
MPASM Assembler .................................................. 418
Auto-Wake-up on Sync Break Character ......................... 246
B
Bank Select Register (BSR) ............................................... 73
Baud Rate Generator ....................................................... 217
Baud Rate Generator (BRG) ............................................ 235
BC .................................................................................... 375
BCF .................................................................................. 376
BF .................................................................................... 221
BF Status Flag ................................................................. 221
Bit Timing Configuration Registers
BRGCON1 ............................................................... 344
BRGCON2 ............................................................... 344
BRGCON3 ............................................................... 344
Block Diagrams
A/D ........................................................................... 256
Analog Input Model .................................................. 257
Baud Rate Generator .............................................. 217
CAN Buffers and Protocol Engine ........................... 280
Capture Mode Operation ......................................... 170
Comparator I/O Operating Modes ........................... 264
Comparator Output .................................................. 266
Comparator Voltage Reference ............................... 270
Comparator Voltage Reference
Output Buffer Example .................................... 271
Compare Mode Operation ....................................... 171
Device Clock .............................................................. 34
Enhanced PWM ....................................................... 179
EUSART Receive .................................................... 244
EUSART Transmit ................................................... 242
External Power-on Reset Circuit
(Slow VDD Power-up) ........................................ 49
Fail-Safe Clock Monitor ........................................... 361
Generic I/O Port ....................................................... 135
High/Low-Voltage Detect with External Input .......... 274
MSSP (I²C Master Mode) ........................................ 215
MSSP (I²C Mode) .................................................... 200
MSSP (SPI Mode) ................................................... 191
On-Chip Reset Circuit ................................................ 47
PIC18F2480/2580 ..................................................... 12
PIC18F4480/4580 ..................................................... 13
PLL (HS Mode) .......................................................... 31
PORTD and PORTE (Parallel Slave Port) ............... 149
PWM Operation (Simplified) .................................... 173
Reads From Flash Program Memory ...................... 105
Single Comparator ................................................... 265
Table Read Operation ............................................. 101
Table Write Operation ............................................. 102
Table Writes to Flash Program Memory .................. 107
Timer0 in 16-Bit Mode ............................................. 152
Timer0 in 8-Bit Mode ............................................... 152
Timer1 ..................................................................... 156
Timer1 (16-Bit Read/Write Mode) ............................ 156
Timer2 ..................................................................... 162
Timer3 ..................................................................... 164
Timer3 (16-Bit Read/Write Mode) ............................ 164
Transmit Buffers ...................................................... 334
Watchdog Timer ...................................................... 358
Block Diagrams Comparator Analog Input Model ............ 267
BN .................................................................................... 376
BNC ................................................................................. 377
BNN ................................................................................. 377
BNOV .............................................................................. 378
BNZ ................................................................................. 378
BOR. See Brown-out Reset.
BOV ................................................................................. 381
BRA ................................................................................. 379
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 50
Detecting ................................................................... 50
Disabling in Sleep Mode ............................................ 50
Software Enabled ...................................................... 50
© 2009 Microchip Technology Inc.
DS39637D-page 475