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PIC18F2480_09 Datasheet, PDF (478/490 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PIC18F2480/2580/4480/4580
Error Recognition Mode ................................................... 330
EUSART
Asynchronous Mode ................................................ 241
Associated Registers, Receive ........................ 245
Associated Registers, Transmit ....................... 243
Auto-Wake-up on Sync Break .......................... 246
Break Character Sequence .............................. 247
Receiver ........................................................... 244
Setting up 9-Bit Mode with Address Detect ..... 244
Transmitter ....................................................... 241
Baud Rate Generator (BRG)
Associated Registers ....................................... 236
Auto-Baud Rate Detect .................................... 239
Baud Rate Error, Calculating ........................... 236
Baud Rates, Asynchronous Modes .................. 237
High Baud Rate Select (BRGH Bit) .................. 235
Operation in Power-Managed Mode ................ 235
Sampling .......................................................... 235
Synchronous Master Mode ...................................... 248
Associated Registers, Receive ........................ 250
Associated Registers, Transmit ....................... 249
Reception ......................................................... 250
Transmission .................................................... 248
Synchronous Slave Mode ........................................ 251
Associated Registers, Receive ........................ 252
Associated Registers, Transmit ....................... 251
Reception ......................................................... 252
Transmission .................................................... 251
Extended Instruction Set
ADDFSR .................................................................. 410
ADDULNK ................................................................ 410
CALLW ..................................................................... 411
MOVSF .................................................................... 411
MOVSS .................................................................... 412
PUSHL ..................................................................... 412
SUBFSR .................................................................. 413
SUBULNK ................................................................ 413
External Clock Input ........................................................... 30
F
Fail-Safe Clock Monitor ............................................ 349, 361
Interrupts in Power-Managed Modes ....................... 362
POR or Wake-up from Sleep ................................... 362
WDT During Oscillator Failure ................................. 361
Fast Register Stack ............................................................ 70
Firmware Instructions ....................................................... 367
Flash Program Memory .................................................... 101
Associated Registers ............................................... 109
Control Registers ..................................................... 102
EECON1 and EECON2 ................................... 102
TABLAT (Table Latch) Register ....................... 104
TBLPTR (Table Pointer) Register .................... 104
Erase Sequence ...................................................... 106
Erasing ..................................................................... 106
Operation During Code-Protect ............................... 109
Reading .................................................................... 105
Table Pointer
Boundaries Based on Operation ...................... 104
Table Pointer Boundaries ........................................ 104
Table Reads and Table Writes ................................ 101
Write Sequence ....................................................... 107
Writing To ................................................................. 107
Protection Against Spurious Writes ................. 109
Unexpected Termination .................................. 109
Write Verify ...................................................... 109
FSCM. See Fail-Safe Clock Monitor.
DS39637D-page 478
G
GOTO .............................................................................. 388
H
Hardware Multiplier
Introduction .............................................................. 117
Operation ................................................................. 117
Performance Comparison ........................................ 117
High/Low-Voltage Detect ................................................. 273
Applications ............................................................. 276
Associated Registers ............................................... 277
Characteristics ......................................................... 437
Current Consumption ............................................... 275
Effects of a Reset .................................................... 277
Operation ................................................................. 274
During Sleep .................................................... 277
Setup ....................................................................... 275
Start-up Time ........................................................... 275
Typical Application ................................................... 276
HLVD. See High/Low-Voltage Detect. ............................. 273
I
I/O Ports ........................................................................... 135
I2C Mode (MSSP)
Acknowledge Sequence Timing .............................. 224
Baud Rate Generator .............................................. 217
Bus Collision
During a Repeated Start Condition .................. 228
During a Stop Condition .................................. 229
Clock Arbitration ...................................................... 218
Clock Stretching ....................................................... 210
10-Bit Slave Receive Mode (SEN = 1) ............ 210
10-Bit Slave Transmit Mode ............................ 210
7-Bit Slave Receive Mode (SEN = 1) .............. 210
7-Bit Slave Transmit Mode .............................. 210
Clock Synchronization and the CKP Bit
(SEN = 1) ......................................................... 211
Effect of a Reset ...................................................... 225
General Call Address Support ................................. 214
I2C Clock Rate w/BRG ............................................. 217
Master Mode ............................................................ 215
Operation ......................................................... 216
Reception ........................................................ 221
Repeated Start Condition Timing .................... 220
Start Condition ................................................. 219
Transmission ................................................... 221
Transmit Sequence ......................................... 216
Multi-Master Communication, Bus Collision
and Arbitration ................................................. 225
Multi-Master Mode ................................................... 225
Operation ................................................................. 204
Read/Write Bit Information (R/W Bit) ............... 204, 205
Registers ................................................................. 200
Serial Clock (RC3/SCK/SCL) ................................... 205
Slave Mode .............................................................. 204
Addressing ....................................................... 204
Reception ........................................................ 205
Transmission ................................................... 205
Sleep Operation ....................................................... 225
Stop Condition Timing ............................................. 224
ID Locations ............................................................. 349, 366
INCF ................................................................................ 388
INCFSZ ............................................................................ 389
In-Circuit Debugger .......................................................... 366
In-Circuit Serial Programming (ICSP) ...................... 349, 366
© 2009 Microchip Technology Inc.