IC43R16160 Datasheet, PDF (25/56 Pages) Integrated Circuit Solution Inc – 4M x 16 Bit x 4 Banks (256-MBIT) DDR SDRAM

IC43R16160
TRUTH TABLE 2 – Current State Bank n - Command to Bank n
(Notes: 1-6; notes appear below and on next page)
CURRENT STATE /CS /RAS /CAS /WE
H
X
X
X
Any
L
H
H
H
L
L
H
H
Idle
L
L
L
H
L
L
L
L
Row Active
L
H
L
H
L
H
L
L
L
L
H
L
L
H
L
H
Read (Auto Precharge
L
L
H
L
Disabled)
L
H
H
L
L
H
L
H
Write (Auto Precharge
Disabled)
L
H
L
L
L
L
H
L
COMMAND/ACTION
NOTES
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
ACTIVE (select and activate row)
AUTO REFRESH
7
MODE REGISTER SET
7
READ (select column and start READ burst)
10
WRITE (select column and start WRITE burst)
10
PRECHARGE (deactivate row in bank or banks)
8
READ (select column and start new READ burst)
10
PRECHARGE (truncate READ burst, start PRECHARGE) 8
BURST TERMINATE
9
READ (select column and start READ burst)
10, 11
WRITE (select column and start new WRITE burst)
10
PRECHARGE (truncate WRITE burst, start PRECHARGE) 8, 11
NOTE:
1. This table applies when CKE_n-1 was HIGH and CKE_n is HIGH (see Truth Table 2) and after ^tXSR
has been met (if the previous state was self refresh).
2. This table is bank-specific, except where noted, i.e., the current state is for a specific bank and the commands shown
are those allowed to be issued to that bank when in that state. Exceptions are covered in the notes below.
3. Current state definitions:
Idle: The bank has been precharged, and ^tRP has been met.
Row Active: A row in the bank has been activated, and ^tRCD has been met.
No data bursts/accesses and no register accesses are in progress.
Read: A READ burst has been initiated, with AUTO PRECHARGE disabled,
and has not yet terminated or been terminated.
Write: A WRITE burst has been initiated, with AUTO PRECHARGE disabled,
and has not yet terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank. DESELECT or NOP com-
mands,
or allowable commands to the other bank should be issued on any clock edge occurring during these states.
Allowable commands to the other bank are determined by its current state and Truth Table 3, and according to
Truth Table 4.
Precharging: Starts with registration of a PRECHARGE command and ends when ^tRP is
met. Once ^tRP is met, the bank will be in the idle state.
Integrated Circuit Solution Inc.
25
DDR001-0B 11/10/2004