IC43R16160 Datasheet, PDF (23/56 Pages) Integrated Circuit Solution Inc – 4M x 16 Bit x 4 Banks (256-MBIT) DDR SDRAM

IC43R16160
Self Refresh
A self refresh command is defined by having CS, RAS, CAS and CKE held low with WE high at the rising
edge of the clock (CK). Once the self refresh command is initiated, CKE must be held low to keep the device
in self refresh mode. During the self refresh operation, all inputs except CKE are ignored. The clock is inter-
nally disabled during self refresh operation to reduce power consumption. The self refresh is exited by sup-
plying stable clock input before returning CKE high, asserting deselect or NOP command and then asserting
CKE high for longer than t_SREX for locking of DLL. The auto refresh is required before self refresh entry and
after self refresh exit.
CK, CK
Command
CKE
Self
Refresh
••
••
Stable Clock
••
••
NOP
••
Auto
Refresh
••
••
tSREX
Power Down Mode
The power down mode is entered when CKE is low and exited when CKE is high. Once the power down
mode is initiated, all of the receiver circuits except clock, CKE and DLL circuit are gated off to reduce power
consumption. All banks should be in idle state prior to entering the precharge power down mode and CKE
should be set high at least 1tck+tIS prior to row active command. During power down mode, refresh opera-
tions cannot be performed, therefore the device cannot remain in power down mode longer than the refresh
period (t_REF) of the device.
CK, CK
••
Precharge
Command
Precharge
power
down
••
Entry
CKE
••
precharge
power
down
Active
Exit
••
••
NOP Read
Active
power down
Entry
••
Active
power down
Exit
Integrated Circuit Solution Inc.
23
DDR001-0B 11/10/2004