IC43R16160 Datasheet, PDF (24/56 Pages) Integrated Circuit Solution Inc – 4M x 16 Bit x 4 Banks (256-MBIT) DDR SDRAM

IC43R16160
TRUTH TABLE 1 – CKE
(Notes: 1-4)
CKEn-1 CKEn
L
L
CURRENT STATE
Power-Down
Self Refresh
COMMANDn
X
X
ACTIONn
Maintain Power-Down
Maintain Self Refresh
NOTES
Power-Down
DESELECT or NOP
Exit Power-Down
L
H
Self Refresh
DESELECT or NOP
Exit Self Refresh
5
H
L
H
H
All Banks Idle
Bank(s) Active
All Banks Idle
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
See Truth Table 3
Precharge Power-Down Entry
Active Power-Down Entry
Self Refresh Entry
NOTE:
1. CKE_n is the logic state of CKE at clock edge n; CKE_n-1 was the state of CKE at the previous clock edge.
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result of COMMANDn.
4. All states and sequences not shown are illegal or reserved.
5. DESELECT or NOP commands should be issued on any clock edges occurring during the ^tXSR period.
A minimum of 200 clock cycles is needed before applying a read command, for the DLL to lock.
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Integrated Circuit Solution Inc.
DDR001-0B 11/10/2004