IC43R16160 Datasheet, PDF (12/56 Pages) Integrated Circuit Solution Inc – 4M x 16 Bit x 4 Banks (256-MBIT) DDR SDRAM

IC43R16160
Auto Precharge Operation
The Auto Precharge operation can be issued by having column address A₁₀ high when a Read or Write
command is issued. If A₁₀ is low when a Read or Write command is issued, then normal Read or Write burst
operation is executed and the bank remains active at the completion of the burst sequence. When the Auto
Precharge command is activated, the active bank automatically begins to precharge at the earliest possible
moment during the Read or Write cycle once t_RAS(min) is satisfied.
Read with Auto Precharge
If a Read with Auto Precharge command is initiated, the DDR SDRAM will enter the precharge operation
N-clock cycles measured from the last data of the burst read cycle where N is equal to the CAS latency pro-
grammed into the device. Once the autoprecharge operation has begun, the bank cannot be reactivated until
the minimum precharge time (t_RP) has been satisfied.
Read with Autoprecharge Timing
T0
CK, CK
Command
DQS
DQ
T1
ACT
(CAS Latency = 2; Burst Length = 4)
T2
T3
T4
T5
T6
T7
T8
T9
t_RAS(min)
t_P (min)
NOP R w/AP NOP
NOP
NOP
NOP
BA
NOP
D₀ D₁ D₂ D₃
Begin Autoprecharge
Earliest Bank A reactivate
12
Integrated Circuit Solution Inc.
DDR001-0B 11/10/2004